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Intel Releases X86S Instruction Set Version 1.2

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Intel Unveils X86S Instruction Set Version 1.2 with Further Simplifications

In a nutshell: Intel has released the latest revision of its pared-down X86S instruction set architecture, version 1.2. This update continues the chipmaker’s promise to optimize the x86 architecture by removing multiple 16-bit and 32-bit features.

The X86S Modernization Plan

The X86S is Intel’s modernization plan for the venerable x86 lineup that powered PCs for decades. The original x86 architecture emerged in 1978 with the 16-bit 8086 processor. Over time, Intel added new capabilities to handle 32-bit and 64-bit computing, resulting in complexity and bloat.

The X86S Version 1.2 Update

The new version 1.2 spec makes good on Intel’s plan by removing multiple 16-bit and 32-bit features, including:

  • Real and protected 16-bit modes
  • 16-bit addressing
  • The antiquated ring 1 and 2 privilege levels
  • Other little-used legacy features
  • This update also includes new CPUID bits, such as X86S (LEGACY_REDUCED_OS_ISA) and SIPI64 (64-bit “start-up” interprocessor interrupt).

    Implications of the X86S Update

    Intel’s decision to remove legacy features could mark a radical break from its longstanding ethos of maximum compatibility. However, the company is likely to coordinate with its longtime x86 partner and rival AMD to ensure the success of the X86S.

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